\doxysection{TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def Struct Reference}
\hypertarget{struct_t_i_m___o_c___init_type_def}{}\label{struct_t_i_m___o_c___init_type_def}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}


TIM Output Compare Configuration Structure definition.  




{\ttfamily \#include $<$stm32h7xx\+\_\+hal\+\_\+tim.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_ae5faa1cba0b3f1ab6179cc54e1015ee8}{OCMode}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a61fb5b9ef4154de67620ac81085a0e39}{Pulse}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a556b7137d041aceed3e45c87cbfb39cd}{OCPolarity}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a21922d8e2fee659d081c4be4c500d1d4}{OCNPolarity}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a4c4203c5ed779ac86fb793bb9d628e55}{OCFast\+Mode}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_ace3e2b76ca2fca0f4961585ed9ebecf5}{OCIdle\+State}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a0d70cc51990d7433fd76cc6ed1d06237}{OCNIdle\+State}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
TIM Output Compare Configuration Structure definition. 

\label{doc-variable-members}
\Hypertarget{struct_t_i_m___o_c___init_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_t_i_m___o_c___init_type_def_a4c4203c5ed779ac86fb793bb9d628e55}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!OCFastMode@{OCFastMode}}
\index{OCFastMode@{OCFastMode}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{OCFastMode}{OCFastMode}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_a4c4203c5ed779ac86fb793bb9d628e55} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+OCFast\+Mode}

Specifies the Fast mode state. This parameter can be a value of \doxylink{group___t_i_m___output___fast___state}{TIM Output Fast State} \begin{DoxyNote}{Note}
This parameter is valid only in PWM1 and PWM2 mode. 
\end{DoxyNote}
\Hypertarget{struct_t_i_m___o_c___init_type_def_ace3e2b76ca2fca0f4961585ed9ebecf5}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!OCIdleState@{OCIdleState}}
\index{OCIdleState@{OCIdleState}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{OCIdleState}{OCIdleState}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_ace3e2b76ca2fca0f4961585ed9ebecf5} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+OCIdle\+State}

Specifies the TIM Output Compare pin state during Idle state. This parameter can be a value of \doxylink{group___t_i_m___output___compare___idle___state}{TIM Output Compare Idle State} \begin{DoxyNote}{Note}
This parameter is valid only for timer instances supporting break feature. 
\end{DoxyNote}
\Hypertarget{struct_t_i_m___o_c___init_type_def_ae5faa1cba0b3f1ab6179cc54e1015ee8}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!OCMode@{OCMode}}
\index{OCMode@{OCMode}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{OCMode}{OCMode}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_ae5faa1cba0b3f1ab6179cc54e1015ee8} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+OCMode}

Specifies the TIM mode. This parameter can be a value of \doxylink{group___t_i_m___output___compare__and___p_w_m__modes}{TIM Output Compare and PWM Modes} \Hypertarget{struct_t_i_m___o_c___init_type_def_a0d70cc51990d7433fd76cc6ed1d06237}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!OCNIdleState@{OCNIdleState}}
\index{OCNIdleState@{OCNIdleState}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{OCNIdleState}{OCNIdleState}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_a0d70cc51990d7433fd76cc6ed1d06237} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+OCNIdle\+State}

Specifies the TIM Output Compare pin state during Idle state. This parameter can be a value of \doxylink{group___t_i_m___output___compare___n___idle___state}{TIM Complementary Output Compare Idle State} \begin{DoxyNote}{Note}
This parameter is valid only for timer instances supporting break feature. 
\end{DoxyNote}
\Hypertarget{struct_t_i_m___o_c___init_type_def_a21922d8e2fee659d081c4be4c500d1d4}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!OCNPolarity@{OCNPolarity}}
\index{OCNPolarity@{OCNPolarity}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{OCNPolarity}{OCNPolarity}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_a21922d8e2fee659d081c4be4c500d1d4} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+OCNPolarity}

Specifies the complementary output polarity. This parameter can be a value of \doxylink{group___t_i_m___output___compare___n___polarity}{TIM Complementary Output Compare Polarity} \begin{DoxyNote}{Note}
This parameter is valid only for timer instances supporting break feature. 
\end{DoxyNote}
\Hypertarget{struct_t_i_m___o_c___init_type_def_a556b7137d041aceed3e45c87cbfb39cd}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!OCPolarity@{OCPolarity}}
\index{OCPolarity@{OCPolarity}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{OCPolarity}{OCPolarity}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_a556b7137d041aceed3e45c87cbfb39cd} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+OCPolarity}

Specifies the output polarity. This parameter can be a value of \doxylink{group___t_i_m___output___compare___polarity}{TIM Output Compare Polarity} \Hypertarget{struct_t_i_m___o_c___init_type_def_a61fb5b9ef4154de67620ac81085a0e39}\index{TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}!Pulse@{Pulse}}
\index{Pulse@{Pulse}!TIM\_OC\_InitTypeDef@{TIM\_OC\_InitTypeDef}}
\doxysubsubsection{\texorpdfstring{Pulse}{Pulse}}
{\footnotesize\ttfamily \label{struct_t_i_m___o_c___init_type_def_a61fb5b9ef4154de67620ac81085a0e39} 
uint32\+\_\+t TIM\+\_\+\+OC\+\_\+\+Init\+Type\+Def\+::\+Pulse}

Specifies the pulse value to be loaded into the Capture Compare Register. This parameter can be a number between Min\+\_\+\+Data = 0x0000 and Max\+\_\+\+Data = 0x\+FFFF 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/\mbox{\hyperlink{stm32h7xx__hal__tim_8h}{stm32h7xx\+\_\+hal\+\_\+tim.\+h}}\end{DoxyCompactItemize}
